发明名称 |
INVERSE DISCRETE COSINE TRANSFORMATION PROCESSOR AND MPEG DECODER |
摘要 |
PROBLEM TO BE SOLVED: To reduce a circuit scale and to maintain a high data rate in a two-dimensional inverse discrete cosine transformation (IDCT) circuit having parallel processing paths using a distribution operation technology. SOLUTION: The parallel processing paths of DCT coefficient data are transformed into odd- and even-numbered processing paths 12. Partial IDCT circuit 105a and 105b execute first one-dimensional transformation in parallel in the parallel paths. DCT coefficient data becomes a parameter and it is transposed in an transposing part 150. The partial IDCT circuits 155a and 155b execute second one-dimensional transformation and the parameter becomes a picture element value. A parallel processing by the even and odd processing paths can be realized since the matrix of one-dimensional transformation can be dissolved into two smaller equations. |
申请公布号 |
JPH09198373(A) |
申请公布日期 |
1997.07.31 |
申请号 |
JP19960277917 |
申请日期 |
1996.10.21 |
申请人 |
MATSUSHITA ELECTRIC IND CO LTD |
发明人 |
RARII FUIRITSUPUSU |
分类号 |
H04N7/30;G06F17/14;G06K9/36;H04N1/41 |
主分类号 |
H04N7/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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