| 摘要 |
<p>PURPOSE:To eliminate the limit of a sampling frequency and the unstability of a circuit by accumulating the basic address signal of a phase generating circuit for 2piXN/M every time a sampling clock T is increased by one and outputting the accumulation result. CONSTITUTION:A phase synchronizing circuit 100 pays attention to a color sub-carrier only out of the digitized NTSC signals which is the output of an A/D converting circuit 4, a phase comparator 101 compares the phase of the color sub-carrier with the output of a signal generating circuit 102 and a phase correcting quantity determining circuit 106 determines the phase correcting quantity for the phase synchronization. The signal generating circuit 102 generates the value of SINtheta.COStheta by the phase for respective sampling clocks (T) based on the output of a phase generating circuit 104 basicly, and is operated in accordance with the phase to correct the phase only by the value instructed by the phase correcting quantity determining circuit 106 for the output of a phase generating circuit 104, namely, the output of a phase correcting circuit 105. Namely, the expression is executed by a phase log2M bit of the color sub-carrier, N is accumulated at every sample, in short, the sampling clock of 13.5MHz and a lower order log2M bit the accumulation result becomes the output of the phase generating circuit 104.</p> |
