Memory device circuit and method for concurrently addressing columns of multiple banks of a multi-bank memory array

摘要

A circuit (36, 52) and method for a memory device (10), such as a synchronous dynamic random access memory (SDRAM) having at least two memory banks (14, 16). Columns of at least two memory banks (14, 16) are concurrently addressable to permit data to be written to, or read from, the at least two memory banks (14, 16) concurrently. By writing data concurrently to more than one memory bank, testing of the memory of the memory device (10) can be effectuated in a reduced period of time. Data can also be written or read from a single bank (14, 16) in a multi-bank RAM without requiring that a particular bank (14, 16) be specified during a read/write command.