| 摘要 |
A non-overlapping signal generation circuit comprising a NOR gate for NORing a chip select signal and an address signal, an inverter for inverting an output signal from the NOR gate, a first inversion circuit for sequentially inverting an output signal from the inverter by an odd number of times, a second inversion circuit for sequentially inverting the output signal from the inverter by an even number of times, an address transition detector for generating an address transition detect signal in response to the output signal from the inverter, and a non-overlapping signal generator for generating an enable signal and a disable signal in response to the address transition detect signal from the address transition detector and output signals from the first and second inversion circuits, the enable signal and the disable signal non-overlapping with each other. According to the present invention, the enable signal and the disable signal can be generated with their high levels accurately non-overlapping with each other for an active pulse duration of the address transition detect signal.
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