发明名称 Semiconductor memory device
摘要 A semiconductor memory device includes first and second MOS transistors connecting a pair of data lines with a specific potential supplying node. A power transmitting circuit couples the specific potential supplying node with a power supply circuit of an equalizing potential after said first and second switching elements are made conductive. The power transmitting circuit isolates the specific potential supplying node from the power supply circuit when the equalization begins. As an alternative to the power transmitting circuit, a supplying circuit may be connected to supply a precharge potential to the specific potential supplying node when the equalization begins, and supply an equalizing potential to the specific potential supplying node when the switching elements are both turned on.
申请公布号 US5652727(A) 申请公布日期 1997.07.29
申请号 US19960681389 申请日期 1996.07.23
申请人 OKI ELECTRIC INDUSTRY CO., LTD. 发明人 TANAKA, YASUHIRO;TANABE, TETSUYA
分类号 G11C11/41;G11C7/12;G11C11/409;G11C11/4094;(IPC1-7):G11C7/00 主分类号 G11C11/41
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