发明名称 A method and apparatus for interfacing a device compliant to first bus protocol to an external bus
摘要 A method and apparatus for interfacing a device which is compliant to a first bus protocol to a second bus having a second protocol and for providing virtual functions through an intelligent bridge. The interface apparatus is coupled to the first bus and the second bus. The interface device detects a configuration cycle on the second bus and translates the configuration cycle into a corresponding cycle in a format understandable by the first bus. The bus cycle is executed on the first bus. A local processor is interrupted by the interface apparatus. A verification and correction program is executed by the local processor to restore configuration header values if the executed bus cycle violated the protocol of the second bus. The interface apparatus insures that requests for access to the first bus are blocked during the execution of the verification and correction program.
申请公布号 AU1431997(A) 申请公布日期 1997.07.28
申请号 AU19970014319 申请日期 1996.12.27
申请人 INTEL CORPORATION 发明人 BYRON GILLESPIE;MARC GOLDSCHMIDT;TERRY SYCH;BRUCE YOUNG
分类号 G06F13/10;G06F13/40 主分类号 G06F13/10
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