| 摘要 |
A method for processing multilevel interconnect lines (34) separately from the multichip module (10) on which they are to be employed. An oxide layer (16) is grown on a silicon wafer (14) and followed by a polyimide layer (18). Then a metal layer (20) is deposited and patterned. This is followed by another polyimide layer (24) having vias (26) and another patterned metal layer (28). The vias (26) allow for connections to be made between metal layers. Many polyimides and metal layers may be processed to allow for the desired number of levels of interconnect lines. After a last polyimide layer (32) is deposited, the oxide layer (16) is etched to separate the multilevel interconnect line transfer (34) from the silicon wafer (14). After the processing of the multilevel interconnect lines (34), the multilevel interconnect line transfer (34) is adhered to the multichip module (10) in a predetermined relationship and electrical connections (19) are made between them. |
