发明名称 BAIHOORAACMOSHANDOTAISOCHINOSEIZOHOHO
摘要 PURPOSE:To speed up operations by a method wherein an emitter electrode is built in an emitter region on a semiconductor substrate and the emitter electrode is equipped with side walls. CONSTITUTION:A diffusion region 21 is provided in a substrate 20 of the plane orientation (100), after which a P-type epitaxial layer 22 is allowed to grow. Next, after the formation of a diffusion region 23, an oxide film 24 is formed, and then a diffusion region 25 is formed so deep as to reach the diffusion region 21. A thermal oxide film 26 is formed, B<+> ions are implanted, and a heat treatment is accomplished. A part of the film 26 positioned on a region 27 is allowed to peel off, a polycrystalline silicon film 28 is deposited, and then As<+> ions are implanted. A process follows wherein the polycrystalline silicon film 28 is patterned for the construction of electrodes 281, 282, and 283, after which a thermal oxide film 29 is formed, when As diffusing out of an emitter electrode results in an emitter region 30. Ions P<+> and then B<+> are implanted for the realization of a high voltage withstanding structure. A CVD oxide film 31 is deposited, which is next etched back for partial retention. Implantation is accomplished of As<+> and BF<+>2, which is followed by a heat treatment whereby source and drain regions 321, 322, 331, 332 and a base region 34 are formed. A passivation film 35 is deposited, and an electrode 36 is built. In this way, base resistance just under the emitter region may be reduced.
申请公布号 JP2633559(B2) 申请公布日期 1997.07.23
申请号 JP19870078567 申请日期 1987.03.31
申请人 TOSHIBA KK 发明人 SHINADA KAZUYOSHI
分类号 H01L27/06;H01L21/331;H01L21/8249;H01L29/73;H01L29/732;(IPC1-7):H01L21/824 主分类号 H01L27/06
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