发明名称 OUTPUT BUFFER OF INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide the output buffer of an integrated circuit for supplying an output buffer having the deviation of a reduced voltage. SOLUTION: The output buffer of an integrated circuit disposed so as to be electrified from a power source giving predetermined potential for supplying the conductor of the integrated circuit has potential dividers R1 , R2 , R3 , to specify reference levels V1 , V2 having a deviation reduced relative to a power source level VDD and a zero, and for the reference level, reference potential is carried to an output junction point Vout , but on the other hand, the deviation of a reduced voltage reduces a pick-up generated by changing over the output buffer.
申请公布号 JPH09191578(A) 申请公布日期 1997.07.22
申请号 JP19960340497 申请日期 1996.12.05
申请人 PLESSEY SEMICONDUCTORS LTD 发明人 DEIBUITSUDO JIYON UIRUKOTSUKUSU
分类号 H02J3/24;H03K19/017;H03K19/0185 主分类号 H02J3/24
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