摘要 |
<p>PROBLEM TO BE SOLVED: To highly precisely adjust a clock skew through the use of a phase locked loop. SOLUTION: The clock skew circuit compensates the input delay of a clock from a clock driver 6 and outputs the clock to a synchronism circuit 8a. A phase locked loop 1a outputting the clock adjusted so that clock input and feedback input have decided phases is provided. An inversion circuit 2a inverting and outputting an input signal is inserted into a feedback path feeding back the clock output of the phase locked loop 1a to feedback input.</p> |