| 摘要 |
A system for scan testing a programmable array of logic cells is provided. The storage circuits of the logic cells are converted into master/slave storage circuits and connected into a shift register for scan testing. The storage circuits require A, B and C clocks during operation. A programmable clock splitter is provided having a first configuration wherein user-supplied A, B and C clocks are provided directly to A, B and C clock inputs of the storage circuits. The programmable switch has a second configuration wherein the A clock is inactivated and the B and C clocks are derived from a single B or C clock signal source. A programmable switch is provided for programmably providing a clock from either the user-supplied A, B and C clock signal sources or an alternative clock signal source. The programmable clock splitter and switch include circuitry for deriving two clocks from alternate phases of a single input clock. Various configurations of the programmable clock splitter and switch are disclosed which provide differing levels of clock selectivity to the logic cells.
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