| 摘要 |
A CCD shift register includes a second gate electrode disposed adjacent to and longitudinally spaced from a first gate electrode, and a buried layer having a first dopant impurity concentration. The first gate electrode is disposed over the buried layer to define a first buried layer area. The second gate electrode is disposed over the buried layer to define a second buried layer area greater than the first buried layer area. In the buried layer, a trench region is formed to have a second dopant impurity concentration greater than the first dopant impurity concentration. The first gate electrode is disposed over the trench region to define a first trench area. The second gate electrode being disposed over the trench region to define a second trench area less than the first trench area. The first and second trench areas are dimensioned so that a first charge storage capacity is equal to or greater than a second charge storage capacity. A tapped CCD shift register includes a first CCD shift register segment and a second shift register segment, both the first and second CCD shift register segments being characterized by a pitch length in the longitudinal direction. The first CCD shift register segment includes a sense node, and the second CCD shift register segment includes a beginning shift register charge storage element, both the sense node and the beginning shift register charge storage element being disposed within one pitch length in the longitudinal direction.
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