发明名称 Reciprocal number arithmetic operating method and circuit which are used in modem
摘要 The level of the input vector signal (X+jY) is reduced to (X+jY)/ 2ROOT 2 in the overflow preventing circuit. A power arithmetic operating circuit squares the level-down input vector signal, to obtain a power value (X2+Y2)/2. The initial value of the tap value (K) which is finally set to a reciprocal number value is multiplied two times by a multiplying circuit, thereby obtaining K2 (X+Y)2/2. Further, a differential circuit obtains an error signal ( DELTA K)=1/2-K2(X2+Y2)/2 with a reference. An updating circuit updates the tap value (K) so that the error signal ( DELTA K) is equal to 0. A loop arithmetic operation of the multiplication of the tap value, differential arithmetic operation, and updating of the tap value is repeated until the error signal ( DELTA K) is converged to a predetermined value or less. The tap value (K) when it was converged is obtained as a reciprocal number value 1/ 2ROOT (X2+Y2) of the amplitude of the input vector signal.
申请公布号 US5650953(A) 申请公布日期 1997.07.22
申请号 US19950468186 申请日期 1995.06.06
申请人 FUJITSU LIMITED 发明人 KAKU, TAKASHI;MIYAZAWA, HIDEO
分类号 H04L27/00;G06F7/48;G06F7/552;G06F17/10;H04M11/00;(IPC1-7):G06F7/552 主分类号 H04L27/00
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