CLOCK SIGNAL DESKEWING SYSTEM

摘要

A system (10) for distributing synchronized clock signals to spatially distributed circuits (15) includes a pair of transmission lines (16, 18) between first (14) and second (24) sites. Deskewing circuits tap the signal transmission lines between the first and second sites. A first delay circuit (DELAY) in each deskewing circuit detects the outgoing clock signal on the first line and produceds a local clock signal (CLKL) that lags the outgoing clock signal by an adjustable delay. A similar second delay circuit in each deskewing circuit delays the local clock signal by a similar delay to produce a local reference signal. A phase lock controller (30) in each deskewing circuit adjusts the delay of the delay circuits so that the local reference signal is phase locked to the returning clock signal on the second line. When reference signals in all deskewing circuits are phase locked to the returning clock signal, their local clock signals have similar phases.