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发明名称
Verfahren und Apparat zum Prüfen der Verlötung von Halbleiterbauteilen durch den Nachweis von Leckstrom
摘要
申请公布号
DE69125571(T2)
申请公布日期
1997.07.17
申请号
DE19916025571T
申请日期
1991.10.07
申请人
HEWLETT-PACKARD CO., PALO ALTO, CALIF., US
发明人
HEUMANN, JOHN M., LOVELAND, COLORADO 80537, US;HARWOOD, VANCE R., NL-1183 GE AMSTELVEEN, US
分类号
G01R31/02;G01R31/265;G01R31/302;G01R31/308;H05K13/08;(IPC1-7):G01R31/304;G01R31/309
主分类号
G01R31/02
代理机构
代理人
主权项
地址
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