发明名称 TEST GENERATION USING SIGNAL FLOW GRAPHS
摘要 The present invention relates to a method and apparatus for generating (18) test patterns to test (19) an analog or mixed signal circuit. A signal flow graph of the analog circuit is determined (12). The signal flow graph is inverted (14) and reverse simulated (16) with good and bad outputs to determine (17) component tolerances of the circuit given circuit output tolerances. The inverted signal flow graph is backtraced (16) from analog outputs to obtain analog input sinusoids which justify the analog outputs.
申请公布号 WO9725626(A1) 申请公布日期 1997.07.17
申请号 WO1997US00125 申请日期 1997.01.02
申请人 RUTGERS UNIVERSITY 发明人 RAMADOSS, RAJESH;BUSHNELL, MICHAEL, L.
分类号 G01R31/316;G01R31/3167;G01R31/317;G01R31/3183;(IPC1-7):G01R31/00 主分类号 G01R31/316
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