Analogue=to=digital signal converting apparatus for radio band width signal

摘要

The apparatus has two ADCs connected in parallel (3.1,3.2), and a clock generator (7) which generates a sample clock signal allowing oversampling. A filter (5) is connected to the outputs of the ADCs and a demultiplexer (9) alternately feeds the clock signal to the two ADCs respectively for a sample clock period. The output signals of each ADC are alternately fed to the filter for further processing. The filter is preferably a complex bandpass filter. A multiplexer (11) may connect the filter alternately with the analog to digital convertor outputs. The multiplexer is synchronised with the demultiplexer.