发明名称 |
Parallel computer with reconstruction of processor clusters |
摘要 |
A parallel computer having a plurality of cluster buses 2 which are connected to the processor (PE) 1 via the selectors 6. The selectors 6 maintain the same condition until the next instruction is received. In this system, the clusters 11 are reconstructed at appropriate timing during the operation of the processor, thus allowing the number of processors PEs in a cluster to be exchanged in response to variation in the process load allocated to each cluster 11. Accordingly, the resources of the computer are used more effectively. The execution environment of each process may be independent. Real time execution of each process can be assured.
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申请公布号 |
US5649106(A) |
申请公布日期 |
1997.07.15 |
申请号 |
US19960641947 |
申请日期 |
1996.05.02 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
TSUJIMICHI, SHINGO;KONDO, MICHIMASA |
分类号 |
G06F15/173;G06F15/16;G06F15/163;(IPC1-7):G06F15/163;G06F17/00 |
主分类号 |
G06F15/173 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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