发明名称 MULTI-BIT TEST CIRCUIT AND ITS TEST METHOD
摘要 <p>PROBLEM TO BE SOLVED: To improve the discovery of a defect rate at test by providing an input and an output to/from a cell block with the same data pattern and a different data pattern in the test data test system. SOLUTION: A control circuit 317 is enabled by prescribed mode information PIRFH and outputs a pattern selection signal MDQC in response to a prescribed adjustment signal PIDSF. A discrimination circuit 332 is enabled in the multi-test operation and compares and discriminates data of outputs of testing cell blocks 22, 24, 26 in response to a pattern selection signal MDQCK. A comparator 32 compares data integrated to an output signal PIDIFF of the discrimination circuit 332 with an output signal RDOI resulting from testing the cell block 22 and interrupts its output when it is discriminated to be defective.</p>
申请公布号 JPH09185899(A) 申请公布日期 1997.07.15
申请号 JP19960349265 申请日期 1996.12.27
申请人 SAMSUNG ELECTRON CO LTD 发明人 KIN HIROSHI;BOKU KOUSHIN;KIN SHIYOUGEN;KOU BOSEN
分类号 G11C29/34;G11C29/10;G11C29/28;(IPC1-7):G11C29/00 主分类号 G11C29/34
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