| 摘要 |
PROBLEM TO BE SOLVED: To reduce a circuit scale compareding with conventional one since the circuit scale of an arithmetic unit which can correspond to an arbitrary operation is large. SOLUTION: The arithmetic unit of a single instruction stream multiple data stream system stores input data in memories 3A-3D in plural processors and reads/writes data from the pertinent memory so as to execute an operation. In the memories 3A-3D in the plural processors, specified values are added 22 to address signals outputted from a control circuit 6A and they can be given to a part of the processors. Thus, the arithmetic unit which can read and write data from the different addresses of the respective processors with one read instruction outputted from one control circuit 6A is provided. Thus, the circuit scale of the arithmetic unit can considerably be miniaturized. |
