| 摘要 |
PROBLEM TO BE SOLVED: To provide an SRAM (static memory) capable of operating at a high speed with a small power-supply consumption current. SOLUTION: In the load circuit of a flip-flop Q1+Q2 constituting a memory cell CEL11, a pair of capacitors C1+C2 charged to the corresponding voltage to a bit-line voltage (about Vdd) is used. The pair of capacitors C1+C2 holds the circuit potential for maintaining the circuit operation state (information storing state) of the flip-flop Q1+Q2 not to hold directly the storage information of the memory cell CEL11. But, when the charge accumulated in the pair of capacitors C1+C2 is discharged by leakage currents, etc., to lower the drain voltage of the flip-flop Q1+Q2 to the one not larger than a certain limit, the circuit operation state of this flip-flop Q1+Q2 can not be maintained to volatilize the storage content of the memory cell CEL11. For preventing the volatilization of the storage content, there are provided means Q11-Q42; DW10+DB10 for charging refreshingly at a certain period the pair of capacitors (C1, C2; information non-holding medium). |
