发明名称 REDUNDANCY FUSE CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To reduce the layout area of the redundancy fuse circuit by conducting pre-charging in response to a low level transition of a clock signal and keeping a state of a redundancy addressing signal of a preceding clock till a succeeding clock. SOLUTION: When a clock signal CLK transits to a low level, a FET21-1 of a pre-charge circuit 10 is turned on and a FET25-1 of a switch circuit 30 is turned off and a node ND 11 is pre-charged. In this case, FETs 21-3, 25-2 of a transfer circuit 40 are turned off according to the signal CLK and a high level of the node ND11 is not delivered to an output node ND. Even when the signal CLK goes to a low level, the high level logic state in the just preceding state is maintained for a latch circuit 50 latching a state of a node ND 15.</p>
申请公布号 JPH09185897(A) 申请公布日期 1997.07.15
申请号 JP19960335959 申请日期 1996.12.16
申请人 SAMSUNG ELECTRON CO LTD 发明人 RI SHIYOUKUN
分类号 G11C11/413;G11C11/401;G11C11/407;G11C17/00;G11C29/00;G11C29/04;(IPC1-7):G11C29/00 主分类号 G11C11/413
代理机构 代理人
主权项
地址