发明名称 Microarchitecture for indicating that the packed data state is full or empty
摘要 An apparatus (e.g. a microarchitecture of a microprocessor) comprising a plurality of tags associated with a first storage area indicating that locations in the first storage area are either empty or non-empty responsive to execution of floating point instructions which modify data contained in the first storage area. A first circuit is coupled to the plurality of tags which sets only the plurality of tags to an empty state responsive to receipt of a first instruction. The first instruction indicates termination of execution of instructions which operate upon the packed data stored in the first storage area. The apparatus further comprises a second circuit coupled to the plurality of tags for setting the plurality of tags to a non-empty state responsive to receipt of a second instruction (or instructions). The second instruction specifies an operation upon packed data stored in the first storage area. The second circuit further sets the plurality of tags to indicate execution of instructions which operate upon the packed data. This apparatus advantageously provides a architecture (e.g. a microarchitecture for a microprocessor) for clearing the packed data state at the end of executed blocks of packed data instructions to leave the floating point state in a clear condition for subsequent operations (e.g. blocks of executed floating point instructions).
申请公布号 AU1345197(A) 申请公布日期 1997.07.14
申请号 AU19970013451 申请日期 1996.12.17
申请人 INTEL CORPORATION 发明人 DAVID BISTRY;LARRY M MENNEMEIER;ALEXANDER D. PELEG;CAROLE DULONG;EIICHI KOWASHI;MILLIND MITTAL;BENNY EITAN
分类号 G06F9/30;G06F9/302 主分类号 G06F9/30
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