发明名称 Memory cell having a shared read/write line
摘要 A DRAM memory having shared read/write lines. The DRAM memory is comprised of an array of 3T memory cells. Data is digitally stored in the form of capacitors that are either charged or discharged. Horizontal data lines are used to convey data bits to be stored in the array of memory cells. Vertical read/write lines are used to perform both read and write functions. Activating a single read/write line causes a bit of data from a memory cell to be placed onto a corresponding data line. Simultaneously, an inverted copy of that data bit is stored in an adjacent memory cell. Hence, instead of having a separate read line and a separate word line for each memory cell, the present invention has a dual function read/write word line.
申请公布号 US5646903(A) 申请公布日期 1997.07.08
申请号 US19960611895 申请日期 1996.03.06
申请人 XILINX, INC. 发明人 JOHNSON, R. ANDERS
分类号 G11C8/16;G11C11/405;(IPC1-7):G11C11/40 主分类号 G11C8/16
代理机构 代理人
主权项
地址