| 摘要 |
A method is described that uses ion implant in order to fabricate a bipolar CMOS. The method includes the steps of forming an oxide layer 2 on a semiconductor substrate 1, forming a buried layer 3 on the substrate 1 by an implant and an oxide layer after growth of an epitaxial, forming a first and second doped regions on predetermined region of the epitaxial growth layer by an implant, forming a doped regions of a P-type channel P and N-type channel N and an emitter by an implant, and forming a gate 6 on a predetermined region of the substrate 1 and then patterning a metal to be contacted to the first and second doped regions. The first doped region is a seperation region of a N-type epitaxial layer 5 and the second doped region is a P-well. Thereby, it is possible to make a process easy and minimize the thickness of an epitaxial layer.
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