| 发明名称 |
Memory masking for periphery salicidation of active regions |
| 摘要 |
An integrated circuit memory fabrication process and structure, in which salicidation is performed on the periphery (and optionally on the ground lines) of a memory chip, but not on the transistors of the memory cells. <IMAGE> |
| 申请公布号 |
EP0747960(A3) |
申请公布日期 |
1997.07.02 |
| 申请号 |
EP19960303780 |
申请日期 |
1996.05.28 |
| 申请人 |
SGS-THOMSON MICROELECTRONICS, INC. |
发明人 |
HODGES, ROBERT LOUIS;NGUYEN, LOI NGOC |
| 分类号 |
G11C11/41;H01L21/8242;H01L27/10;H01L27/105;H01L27/108 |
主分类号 |
G11C11/41 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
|
| 地址 |
|
