发明名称
摘要 In order to deal with a large amount of data and achieve a high-speed data transfer, an electronic musical instrument employs the configuration providing with plural CPUs and one main memory (RAM) so that the memory is accessed by plural CPUs. Herein, each of the CPUs provides a specific data bus, so that each of them can receive and transfer data via the specific data bus. When performing a data transfer between each CPU and memory, a line connection is selectively established between the memory and selected one of the data buses, so that each CPU can easily perform a data transfer by accessing the memory via its data bus.
申请公布号 JP2626387(B2) 申请公布日期 1997.07.02
申请号 JP19910341548 申请日期 1991.12.24
申请人 发明人
分类号 G10H1/00;G10H1/18;G10H7/00 主分类号 G10H1/00
代理机构 代理人
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地址