发明名称 |
Dynamic random access memory having a stacked fin capacitor with reduced fin thickness |
摘要 |
<p>A method for fabricating a dynamic random access memory, wherein during the fabrication an insulation layer and an etching stopper layer are deposited on a semiconductor substrate and a conductor layer is formed on the insulation layer. The conductor layer is patterned to form a capacitor electrode (50). Thereafter, the insulation layer is removed by an etching process and a dielectric film is deposited on the capacitor electrode. An opposing electrode buries the capacitor electrode. The insulation layer is removed by an dry etching process using a vapor mixture of HF and H2O conducted intermittently in the form of a plurality of etching steps with an intervening drying process interposed between the etching steps.</p> |
申请公布号 |
EP0782195(A2) |
申请公布日期 |
1997.07.02 |
申请号 |
EP19970103295 |
申请日期 |
1992.07.17 |
申请人 |
FUJITSU LIMITED |
发明人 |
EMA, TAIJI;MASAAKI, HIGASHITANI;IKEDA, TOSHIMI;KAWANO, MICHIARI;NOMURA, HIROSHI;KATAYAMA, MASAYA;KUWAMURA, MASAHIRO |
分类号 |
H01L21/8242;H01L27/108;(IPC1-7):H01L27/108;H01L21/824 |
主分类号 |
H01L21/8242 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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