发明名称 |
Programmable logic device with internal time-constant multiplexing of signals from external interconnect buses |
摘要 |
A method and on-chip architecture are disclosed for multiplexing signals from selected external interconnect buses to chip internal buses such that bus rerouting can be implemented programmably without substantially affecting timing relations between time-parallel signals of a rerouted bus. An on-chip switch matrix is provided having N input lines crossing with M output lines to provide N times M crosspoints. A plurality of substantially less than N times M programmable interconnect switches (PIP's) are distributed symmetrically among the NxM crosspoints such that a same first number of interconnect switches (PIP's) are found along each of the N input lines thereby providing equal loading on each input line. The plurality of programmable interconnect switches (PIP's) are further distributed among the NxM crosspoints such that a same second number of interconnect switches (PIP's) are found along each of the M output lines thereby providing equal loading on each output line.
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申请公布号 |
US5644496(A) |
申请公布日期 |
1997.07.01 |
申请号 |
US19930080658 |
申请日期 |
1993.06.18 |
申请人 |
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发明人 |
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分类号 |
H03K19/173;H03K19/177;(IPC1-7):H03K17/693 |
主分类号 |
H03K19/173 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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