| 摘要 |
This invention is an iterative technique for division. The divisor has N bits and the numerator has more than N bits, generally 2N bits. Each iteration includes initial detection of the position of a left most one bit (1011, 1035) of N most significant bits of the numerator. If this L is not zero, then the numerator in left shifted by L places (1016, 1039), the next L quotient bits are set to zero and the number of completed iterations of the division is incremented by L. An alternative embodiment detects bit position of the left most one of an exclusive OR of the N most significant bits of the numerator and the divisor. If this is nonzero, then the numerator shifts this number of places and the corresponding quotient bits are set to "0". Next the division technique calculates the difference between the N most significant bits of the numerator and the divisor. If the difference is greater than or equal to zero, then the next quotient bit is "1". If the difference is less than zero, then the next quotient bit is "0". The difference is substituted for the N most significant bits of the numerator, if this difference was greater than or equal to zero. Then the numerator is left shifted one place. These iterations repeat until the number of iterations exceeds N. Then the quotient is completely formed and the data of the last numerator is the remainder of the division. This technique eliminates useless data manipulation for the cases where this technique determines the quotient bits are "0". Using pre- and post-processing this technique can be used with signed numbers. In the preferred embodiment of this invention, the division logic is embodied in at least one digital image/graphics processor as a part of a multiprocessor formed in a single integrated circuit used in image processing.
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