发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To rapidly and stably operate a sense circuit of a next stage by adding a CMOS positive feedback preamplifier circuit to a common data line and rapidly enlarging the potential difference of the common data line. SOLUTION: A pulse is applied toϕCDQ,ϕCDQ-bar in signal transit period of d, d-bar, and Q202, Q203 are conducted temporarily, and the signal transition of and d, d-bar are performed. Then, when a signal potential difference by a newly selected memory cell starts to occur on the d, d-bar, Q204, Q205 are conducted by pulsesϕCDA.ϕCDA-bar, and a PFB1 is operated. Thereafter, after sense operation after the next stage is ended, the Q204, Q205 are made non-ocuductive by theϕCDA.ϕCDA-bar, and the DFB1 isn't operated. Then, the signal read out from an SRAM memory cell through a Y direction switch is transmitted to the common data lines d, d-bar through direct connection between the input signal of the PFB1 and an output signal line.
申请公布号 JPH09171693(A) 申请公布日期 1997.06.30
申请号 JP19960344989 申请日期 1996.12.25
申请人 HITACHI LTD 发明人 SASAKI KATSURO;SHIMOHIGASHI KATSUHIRO;ISHIBASHI KOICHIRO;HANAMURA SHOJI
分类号 G11C11/419;G11C11/409;(IPC1-7):G11C11/419 主分类号 G11C11/419
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