Method of forming submicron contacts and vias in an integrated circuit

摘要

A method of forming a small geometry via and a structure formed thereby in which an opening is formed partially through an insulating layer (16), sidewalls (26) formed in the opening, and the remaining insulating layer etched to expose an underlying conductive region (14). Alternatively a thick oxide (36') is formed in the opening and etched to form sidewalls (38). Alternatively, an etch stop layer (42) is formed between the insulating layer and conductive region and an opening formed exposing the etch stop layer. A sidewall spacer film (46) is formed over the insulating and etch stop layers. The etch stop and spacer layers are etched thereby forming a contiguous layer. Alternatively a second insulating layer (56) is formed over the etch stop layer (54). An opening is formed then the spacer film (66) is formed. An etch exposes a portion of first insulating layer (16). A second opening is formed in the first insulating layer.