发明名称 Register file read/write cell
摘要 A cell in a multiport memory is connected to a respective bit line via respective switches. A write enable element is located between the switches and an input of the cell's storage device. A read enable element is located between an output of the storage device and the same switches. Thus, read bit lines and write bit lines are merged and the number of switches per cell is drastically reduced with respect to prior art multiport memories.
申请公布号 US5642325(A) 申请公布日期 1997.06.24
申请号 US19950534682 申请日期 1995.09.27
申请人 PHILIPS ELECTRONICS NORTH AMERICA CORPORATION 发明人 ANG, MICHAEL ANTHONY
分类号 G11C11/41;G11C8/16;(IPC1-7):G11C7/00 主分类号 G11C11/41
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