发明名称 Method for fabricating conductive structures in integrated circuits
摘要 A method for fabricating conductive structures in integrated circuits. A conductive layer is formed over an underlying region in an integrated circuit. The conductive layer is then doped with impurities, and a thin amorphous silicon layer is formed over the conductive layer. A photoresist layer is then deposited and exposed to define a masking pattern. During exposure of the photoresist layer, the amorphous silicon layer acts as an anti-reflective layer. Portions of the photoresist layer are then removed to form a masking layer, and the insulating layer and amorphous silicon layer are then etched utilizing the masking layer to form conductive structures. During subsequent thermal processing, impurities from the conductive layer diffuse into the amorphous silicon layer causing the amorphous silicon layer to become conductive.
申请公布号 US5641708(A) 申请公布日期 1997.06.24
申请号 US19950387243 申请日期 1995.02.13
申请人 SGS-THOMSON MICROELECTRONICS, INC. 发明人 SARDELLA, JOHN C.;KALNITSKY, ALEXANDER
分类号 H01L21/28;H01L29/49;(IPC1-7):H01L21/28 主分类号 H01L21/28
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