发明名称 |
CACHE LINE REPLACE APPARATUS AND METHOD |
摘要 |
Cache line replace device is operated as follows; (a) It saves write-back-data in a write-back-buffer, and simultaneously saves the data of memory bus in read-buffer during the saving of write-back-data all(51). (b) If the store of write-back-data is finished(52), CPU/cache bus reads the data to be saved in read-buffer(53), and after reading all, and reads the data of memory bus(54). (c) The data of memory bus are all transferred to CPU/cache bus, CPU reads from CPU/cache bus, and write-backs the data to be saved in write-back-buffer in main memory.
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申请公布号 |
KR970010368(B1) |
申请公布日期 |
1997.06.25 |
申请号 |
KR19940000879 |
申请日期 |
1994.01.18 |
申请人 |
SAMSUNG ELECTRONICS CO.,LTD |
发明人 |
PARK, JI-KYUNG;HWANG, SEUNG-HEE |
分类号 |
G06F12/08;(IPC1-7):G06F12/08 |
主分类号 |
G06F12/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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