ARRAY SYSTEM ARCHITECTURE OF MULTIPLE PARALLEL STRUCTURE PROCESSORS

摘要

The invention relates to a system of elementary processors in array form organized in accordance with a plurality of nodes (1a-1d) with SIMD operation, each having a plurality of elementary processors (3) connected to one another so as to form a ring of elementary processors (2), each elementary processor being associated with a connection cell (7a) connected to the cells of neighbouring elementary processors in order to form a ring network (4). Each SIMD node is provided with a memory and addressing module (II) ensuring an addressing independence of the node, as well as a control unit (9) connected to the control units of neighbouring nodes in order to form an internode control network (6) in which priority tokens circulate, each memory and addressing module of a node being connected to the memory and addressing module of neighbouring nodes so as to form an internode data network (8). Application to the simulation of fluid flows.