发明名称 FLASH MEMORY CONTROL METHOD AND UNIT THEREFOR
摘要 PROBLEM TO BE SOLVED: To shorten the writing time by transferring a modified data to a modifying area of an alternating block simultaneously giving instruction for erasing a current block to replace a physical address of a block indicated by a logical address with a physical address of the alternating block. SOLUTION: A logical address indicating a heat area of a location where a reloading data fed from a body device 2 stored is set for a logical address holding means 4. When the length of the reloading data and a directive for reloading are set to a memory control means 8, a logical block address held by the means 4 is inputted to an address conversion means 6 by the means 8. A physical block address indicating the current block outputted from the means 6 is set for a physical address holding means 5. A blank block managing means 7 is searched updating the address, until the address coincides with a value indicting an element address part of the physical block address prior to the altering thereof.
申请公布号 JPH09161491(A) 申请公布日期 1997.06.20
申请号 JP19950315244 申请日期 1995.12.04
申请人 FUJITSU LTD 发明人 TAKANO HIROSHI
分类号 G06F12/16;G06F12/00;G06F12/02;G06F12/06;G11C16/02;G11C16/06;G11C17/00 主分类号 G06F12/16
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