| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide the clock reception circuit with a high noise margin having provision for waveform distortion of an input signal. SOLUTION: A clock input terminal 101 receives a tri-state clock signal consisting of a positive pulse, a midpoint potential pulse and a negative pulse (AMI signal) as an input signal and the amplitude of the positive pulse and the negative pulse in this input signal is identified by using a voltage comparator means 120 having an analog voltage comparator function. The analog voltage comparator function section for an output signal from the comparator means 120 outputted from a clock output terminal 127 as a clock signal source via an OR circuit 125 is configured by a threshold voltage adjustment circuit 102 which uses a threshold voltage resulting from multiplying a resistance voltage division ratio with a potential between an amplitude level of the input signal at a prescribed time and the midpoint potential.</p> |
