发明名称 MODULE RELIEF METHOD AND MEMORY MODULE AND COMPUTER SYSTEM USING IT
摘要 PROBLEM TO BE SOLVED: To efficiently acquire I/O partial products from relative many address partial products when constituting such memory module as a DRAM using the partial products. SOLUTION: In the memory module which is constituted of four defective chips 1-4 according to I/O partial products where address partial products have been relieved and one good chip 5, each is connected to I/O terminal I/O0-I/O15 and common address input terminal AX0-AX12. For the relief of the address partial products to I/O partial products, there are three methods, namely, a method for perfuming DC relief by cutting the power supply of a defective mat immediately before entering a memory mat, a method for preventing a defective mat from being activated by fixing the selection signal of the defective memory mat to a low level, and a method for relieving by switching the selection signal of memory mats and further changing the connection of I/O lines.
申请公布号 JPH09161497(A) 申请公布日期 1997.06.20
申请号 JP19950315457 申请日期 1995.12.04
申请人 HITACHI LTD 发明人 NAKAI KIYOSHI;KAJITANI KAZUHIKO
分类号 H01L27/10;G11C11/401;G11C29/00;G11C29/04;H01L21/8242;H01L27/108 主分类号 H01L27/10
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