| 摘要 |
A method of forming multilevel resist pattern includes the steps of forming at least first alignment mark on a silicon substrate 20 on which a cell region 23 having a plurality of cell patterns 24 is formed, depositing a lower layer 25 on the silicon substrate 20, coating a lower resist layer 26 on the lower layer 25, exposing and developing the lower resist layer 26 to form a second alignment mark, forming a middle-level insulating layer 30 on the lower resist layer 26, coating a upper resist layer 31 on the middle-level insulating layer 30 to form a MLR layer 32, exposing the upper resist layer to form a latent image pattern 34 in an exposure region 31-1, performing silylation process to form a silylation layer 35 on the upper resist layer 31, selectively etching the upper resist layer to form a upper resist pattern 31', removing the silylation layer 34, patterning the middle-level insulating layer using the upper resist pattern 31' as a mask, and etching the lower resist layer 26 using the patterned middle-level insulating layer 30 as a mask to form a MLR pattern 32'.
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