发明名称 INTERRUPT GENERATION CIRCUIT FOR THE CDMA TERMINAL - MOBILE CALL SIMULATOR INTERFACE
摘要 An interrupt signal generating circuit which samples a clock in synchronism with a data enable signal of a mobile station in a CDMA system is disclosed. In the circuit, A clock signal generator generates a clock signal in synchronism with a data enable signal from a mobile station in a CDMA system. A pulse generator counts the data enable signal in an active state and generates a predetermined pulse when the data enable signal finishes the active state. A pulse width modulator delays the predetermined pulse for a predetermined time and controls the width of the pulse.
申请公布号 KR970009749(B1) 申请公布日期 1997.06.18
申请号 KR19940032094 申请日期 1994.11.30
申请人 KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE 发明人 OH, HYUN-SEO;LEE, SANG-CHUN;SEO, MIN-SIK;LIM, DUK-BIN
分类号 G06F9/46;(IPC1-7):G06F9/46 主分类号 G06F9/46
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