| 摘要 |
A CRC encoder in which a processing velocity is improved by using a plurality of CRC encoders which are selected according to the order of frame data is disclosed. The CRC encoder includes a first CRC encoder(10) for CRC-processing a first frame data; a second CRC encoder(20) for CRC-processing a n-th frame; a third CRC encoder(30) for CRC-processing the last frame data; a multiplexer(40) for selecting an output of the first CRC encoder(10) in the first data, an output of the second CRC encoder(20) in the n-th data, and an output of the third CRC encoder(20) in the last data; and a residue register for temporarily storing an output of the multiplexer(40) and feed-backing the output of the multiplexer(40) to the CRC encoder(20, 30).
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