发明名称 Word driver circuit and a memory circuit using the same
摘要 The present invention relates to a word driver circuit provided in a memory circuit. The word driver circuit comprises a P channel and an N channel transistor having a gate electrode commonly connected and one source or drain electrode commonly connected. The N channeltransistor has another source or drain electrode connected to a ground. A word line is connected to the commonly connected source or drain electrode of the transistors. A first selection signal, generated by decoding a first group of address signals, whose potential is either a first potential by which the N channel transistor is rendered conductive or a second potential lower than the first power supply is supplied to the gate electrodes. And a second selection signal, generated by decoding a second group of address signals, whose potential is either a third potential of the selected word line or a fourth potential equal or lower than the first power supply is supplied to another source or drain of the P transistor.
申请公布号 US5640359(A) 申请公布日期 1997.06.17
申请号 US19960686385 申请日期 1996.07.25
申请人 FUJITSU LIMITED 发明人 SUZUKI, TAKAAKI;TAKEMAE, YOSHIHIRO;NAKANO, MASAO
分类号 G11C11/407;G11C8/08;G11C8/14;G11C11/401;H01L21/8242;H01L27/108;(IPC1-7):G11C8/00 主分类号 G11C11/407
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