发明名称 Memory apparatus
摘要 The present invention relates to a memory apparatus to be able to do write protection and aims to protect data in a specified area in a memory device not to be easily rewritten. When address signals A11 to A0 outputted from a microprocessor are written in the area 300 to 3FF, a CS signal from an address decoder for memory selection to a memory device is "enable" and it is possible to read from and write in the memory device. In the case in which the address signals are written in the area 3F0 to 3FF, the address decoder for write protection becomes "enable" and an output of an AND circuit is selected by a selector and is supplied to the memory device as a WE signal. If a write control signal is "enable", the WE signal outputted from the microprocessor is not masked by the AND circuit and it is possible to write in the memory device.
申请公布号 US5638316(A) 申请公布日期 1997.06.10
申请号 US19950550989 申请日期 1995.10.31
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. 发明人 HOSOKAWA, TATSUHIRO;KAJI, HITOMI
分类号 G06F12/14;H04N7/167;(IPC1-7):G11C5/02 主分类号 G06F12/14
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