| 摘要 |
PROBLEM TO BE SOLVED: To generate a PN pattern even when a clock has a high speed by reducing the number of output per circuit. SOLUTION: This device has a code generation part generating n-parallel PN(pseudo random) codes and a parallel-serial conversion circuit 37 serializing the generated n-parallel PN codes. In this case, the code generation part has plural code generation circuits 311, 321, 331 and 341 generating n-parallel PN codes and selection parts 312, 322, 332 and 342 provided for each code generation circuit 311, 321, 331 and 341. Each selection part 312, 322, 332 and 342 specifies each column of a prescribed number which is smaller than the n from the n- parallel code generated in each code generation circuit 311, 321, 331 and 341 and inputs each column in the parallel-serial conversion circuit 37. In the parallel-serial conversion circuit 37, the n-parallel PN codes are generated and these n-parallel PN code are serialized by bundling the parallel PN codes of each prescribed number from each selection part 312, 322, 332 and 342. |
