| 摘要 |
PROBLEM TO BE SOLVED: To provide an oscillator which, is capable of performing a high speed response by the clock which has lower speed than a conventional clock. SOLUTION: This oscillator uses a feedback loop defining the digital value in which the 2πradian of the phase integration output that the phase increase step value (digital value) inputted from the outside is integrated by a reference clock is defined as a method as a feedback phase signal. In this case, output of a first register 102-2 successively storing the addition value of a first group in which the output of the feedback loop is added to each of plural different multiplication values which are different in phase increase step value, the output of the feedback loop and the addition output in which the output that the phase increase step value is multiplied by the multiplication value which is different from the plural multiplication values is added to the output of the feedback loop by a reference clock, and the addition value of a second group in which this output of the first register is added to each of the plural different multiplication values are recorded and read by the reference clock. This reading output is selected and designated by the reference clok and the frequency division clock of the reference clock and the output is made to be obtained.
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