| 摘要 |
PROBLEM TO BE SOLVED: To prevent misrecognition of defect and remaining of untested area by obtaining the upper limit of time when no defect can be found by a plurality of ultrasonic probes at the same time and setting it at the closing timing of defect defecting gate. SOLUTION: When a width of a gate signal 22 is Wo at the time when gate circuits 131 to 135 close defect detection gates at a timing t0 in accordance with nominal plate thickness, a gate signal where the gate width from Wo -δ to Wo +ε (δ, ε: optional value) is changed at a specified pitch in time is generated successively by a gate control circuit 14, and the output of defect detection gate is monitored by a micro computer 15. The width W1 of upper limit gate signal in which respective separate ultrasonic probes 101 to 105 cannot detect any defect simultaneously is obtained, and the width W1 is set in a gate control circuit 14. Thus, while the width of the gate signal 22 is changed, the level of signals 231 to 235 showing the presence or absence of internal defect is monitored, further the upper limit W1 of width of a gate signal where the output of five gate circuits 131 to 135 is still at a low level. Therefore, when the width of the gate signal 22 is fixed at W1 , the defect detection gate can be closed immediately before rising of bottom reflection wave. |
