MANUFACTURING PROCESS FOR THIN-FILM CIRCUITS COMPRISING INTEGRATED CAPACITORS

摘要

There is described a manufacturing process for thin-film circuits comprising the phases of: a) sputtering of superimposed layers of TaN, Ti, Pd1, Ta2O5 and Pd2 (2, 3, 4, 5, 6) in a single vacuum cycle, b) photoetching of the Pd2 layer and creating upper electrodes (ES) of capacitors (CAP), c) photoetching of the Ta¿2?O5 layer and creation of respective dielectrics (DL) more extensive than the upper electrodes, d) photomasking and growth of galvanic gold (11) along conductive paths (1c1, 1c2) and a resistive path (1r) and opposite lower electrodes (EI) forming crowns (COR) which enclose the dielectrics, e) engraving of Pd?1¿, Ti and TaN outside the galvanic gold (11) to create the capacitors (CAP) and the conductive lines (1c1, 1c2), f) engraving of Au, Pd1 and Ti opposite the resistive paths (1r) to create the resistors (RES), and g) execution of metallic air bridges (ABR) to interconnect the upper electrodes of the capacitors with the rest of the circuit.