摘要 |
<p>A digital phase-locked circuit (10) has a voltage controlled oscillator (17) whose output is counted in a counter (13), said counter (13) being latched on the basis of the frequency of an external input signal. If the external frequency drops out, an internally generated frequency latches the counter circuit (13), and an adjustment signal from a compensation circuit adjusts the phase detector. The compensation circuit (12) consists of an 11-bit counter (26) which counts the output signal from the voltage controlled oscillator (17). The contents of the counter (26) are renewed in periods determined by the internal signal. If the external signal drops out, the counter (26) instantaneously locks to the value last locked, and a third counter (22) provides a signal which can be supplied as an input signal to the counter (13), said third counter (22) being adapted so as to apply a signal to a circuit (25) when the counted value in the third counter (22) corresponds to a quantity calculated from the counter (26).</p> |