发明名称 MOS transistor and fabrication process therefor
摘要 <p>An MOS transistor comprises a semiconductor substrate having a field region; a gate electrode formed on the semiconductor substrate through the intermediatry of a gate insulating film; and source/drain regions formed in the semiconductor substrate; wherein the field region including at least a lower insulating film and an upper insulating film made of a material permitting the upper insulating film to be selectively etched with respect to the lower insulating film; the gate electrode being configured such that the gate length of a top surface thereof is greater than the gate length of a bottom surface thereof facing a channel region positioned between the source/drain regions; the gate electrode having a sidewall spacer formed of a sidewall insulating layer made of the lower insulating film and a material permitting the sidewall insulating layer to be selectively etched with respect to the upper insulating film, the sidewall spacer contacting a side wall of the gate electrode for covering an outer periphery of the channel region; and the channel region being substantially leveled with the source/drain regions. &lt;IMAGE&gt; &lt;IMAGE&gt;</p>
申请公布号 EP0777269(A2) 申请公布日期 1997.06.04
申请号 EP19960305957 申请日期 1996.08.15
申请人 SHARP KABUSHIKI KAISHA 发明人 IGUCHI, KATSUJI;AZUMA, KENICHI;KAWAMURA, AKIO
分类号 H01L29/78;H01L21/265;H01L21/28;H01L21/336;H01L21/8234;H01L21/8238;H01L27/088;H01L27/092;H01L29/423;(IPC1-7):H01L21/823 主分类号 H01L29/78
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